SoC4sensing Chair PhD Scholarship Position 2: System-on-Chip design for Networking on Critical Sectors

SoC4sensing Chair PhD Scholarship Position 2: System-on-Chip design for Networking on Critical Sectors

The Chair SoC4sensing on Semiconductor Design of the University of the Basque Country (UPV/EHU) offers three PhD scholarships focused on System-on-Chip design for Networking on Critical Sectors. The duration of these scholarships is four years. SoC4sensing Chair is funded by private sector companies like soc-e.com and Ikerlan Coop. and by the Spanish Government. It is supported by 17 researchers from two research groups, APERT and GDED from UPV/EHU.

Position Description

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Context

The Chair SoC4sensing on Semiconductor Design of the University of the Basque Country (UPV/EHU) offers three PhD scholarships focused on System-on-Chip design for Networking on Critical Sectors. The duration of these scholarships is four years.

SoC4sensing Chair is funded by private sector companies like soc-e.com and Ikerlan Coop. and by the Spanish Government. It is supported by 17 researchers from two research groups, APERT and GDED from UPV/EHU.

Research Topic

The main objective of this Ph.D. is obtaining a VLSI implementation of a Time-Sensitive Networking device for Quantum Network Control.

The operative objectives of this research are to:

  • Define and integrate an accurate time synchronization mechanism for TSN end-points valid for Quantum Network Control plane.
  • Obtain an optimized TSN IP for the selected end-point.
  • Obtain a high-performance VLSI layout for the selected end-point.
  • Design, manufacture and test Ultra-Deep SubMicron tapeouts.

The specific tasks scheduled for this position are:

  • State-of-the-Art Analysis: VLSI implementations of Ethernet nodes.
  • TSN end-point node front-end design: Define an optimum configuration of the TSN IP parameters for the targeted end-point.
  • VLSI layouts.
  • TSN end-point node back-end design.
  • TSN end-point node prototypes verification.

Mandatory Requirements

Master's degree (or equivalent) in engineering, electronics, electrical engineering, physics or computer science.

Fluent English level

Additional Requirements

  • Strong interest for research and development of new prototypes, especially in the area of edge-computing
  • Skilful in software/hardware engineering, optimally prior experience in FPGA developments, etc.

Offering

  • SoC4sensing Chair offers expert training on SoC VLSI back-end design to the candidate. This training trains the candidate to design digital semiconductor devices using the industry's design tools and fabs technology libraries.
  • Excellent working conditions where people feel safe and can make meaningful connections with one another in attractive research environment.
  • Flexible work model and a range of various training opportunities for personal growth.

Expression of Interest

If you are interested in applying for the scholarship, please contact Prof. Armando Astarloa via email (armando.astarloa@ehu.eus) and [PhD-SOC4SENSING-PIF2] as the subject of the email) by sending your CV (including prior knowledge, skills, and publications, if any).

Candidates will be contacted for an interview and additional information for finalizing the application.

The Ph.D. scholarship will start 01/11/2024.

Location and others

SoC4sensing Chair is located in the Faculty of Engineering of Bilbao (https://www.ehu.eus/en/web/bilboko-ingeniaritza-eskola/website). This Faculty is located in the city center of Bilbao, very close to San Mames Stadium. Thus, it is easily reached by metro, tram, and bus. In addition, it offers public transport to reach all the Bizkaia coast and mountain.