Nowadays, power electronics is playing a very important role in many energy conversion processes. Thanks to power electronics converters, the characteristics of the electric energy can be modified. In this context, AC/AC conversion is specially relevant because it is necessary in many traction and generation applications. There is a wide variety of converters for AC/AC conversion (cycloconverter, back-to-back converter, multilevel converter, etc.) among which the Matrix Converter (MC) presents very differentiated characteristics.

The MC achieves direct conversion of AC to AC without reactive elements and with a very modular design and small size. Furthermore, the flux of power is bidirectional and the power delivered is of high quality. In spite of all this, the MC is not yet a mature technology, mainly because there is no natural bidirectional semiconductors and the converter lacks in robustness. Complexity is an added drawback in this converter.

This thesis presents, firstly, an exhaustive study of the properties and the switching and modulation techniques of the MC. In a second stage, a variation on the Space Vector Modulation (SVM), the Double Sided Space Vector Modulation (DS SVM), is analyzed in detail. This modulation technique improves the harmonic spectrum of the currents and voltages of the MC, but, on the other side, it has extremely large computation requirements. On the other hand, a method for a simplified synthesis of the modulation algorithm is presented. Also, the interaction between DS SVM modulation and semisoft commutation in the drivers and auxiliary supplies for the semiconductors of the MC has been determined.

With the aim of finding a solution for high speed requirements of the MC, and taking into account that the MC behaves better with high switching frequencies, a new System on Chip (SoC) for the control of the MC has been developed. The new SoC has many embedded features such as control, modulation and some protection cores of the converter. All these cores (altogether 30 ) have been implemented in hardware in a single FPGA. By means of this architecture, the execution speed obtained is much faster than required by the DS SVM. This performance proves that FPGAs are an alternative to traditional DSP designs.

On the other hand, all necessary design criteria for a MC have been determined in an exhaustive way. These criterions have been used to build a 7.5 kW MC prototype. Moreover, the MC architecture has been improved by means of some hardware changes, which includes, mainly, a variation of the MC clamp circuit and a new start-up circuit. Taking these contributions into consideration, the critical start-up of the MC has been improved. Besides of this, a driver configuration has been presented which optimizes the switching times of the IGBTs in the MC. Lastly, a novel fault tolerant MC configuration is proposed. Thanks to this configuration, the MC can operate at full rating when there is a failure in any of its IGBTs.