In the last years, the integration level of electronic circuits has been widely increased with the development of design and manufacturing techniques. As a result, complex system can be implemented inside of a single device. This high level of integration concept, in connection with design, is commonly known as SoC (System-on-Chip). One of the most interesting platforms to implement these systems are the FPGAs (Field Programmable Gate Array), due to their flexibility and the continued innovation in their technology.

However, one of the most remarkable problems using SRAM and flash technologies is that certain FPGAs are especially sensitive to effects caused by energetic particles from the cosmic radiation. Owing to these effects, different system failures can be produced, from worthless ones to really serious ones. The worst failures might even hinder the correct performance of several important systems in relation to railway, automotion or industrial control. Hence, a wrong performance of these systems might cause permanent damages in highly expensive equipment and even endanger the human life itself.

On the other hand, most of the electronic devices which are used daily make use of embedded systems which incorporate one ore more processor cores for the execution of the different tasks. Following this idea this work performs a research in the field of fault tolerance for SRAM based FPGA designs especially focusing on soft-processors. With the aim of improving the well established hardening techniques, this work proposes several approaches that deal with distinct aspects related to fault tolerance.